An epitaxial wafer is a high quality wafer forming a single crystal silicon layer (epitaxial film) having a thickness of several micrometers on such as a silicon substrate by typically vapor-growing. An epitaxial silicon wafer is advantageous in that a wafer heavily doped with dopants such as boron (B) or phosphorus (P) can be produced in response to requests from device manufacturers or the like.
A conventional general method of producing an epitaxial wafer will be described with reference to FIG. 8. FIG. 8(a) shows the vicinity of an end of a semiconductor wafer 40 with a beveled portion 41 formed on its end portion. An epitaxial film 50 is formed on a top surface 42a of this semiconductor wafer 40 (FIG. 8(b)) to form an epitaxial wafer 200. Recent epitaxial growth techniques have been making it possible to form the epitaxial film 50 having a uniform thickness all over with respect to the top surface 42a of the semiconductor wafer 40.
However, with respect to the rear surface 42b of the semiconductor wafer 40, when epitaxial growth is performed, a reactive gas used to form the epitaxial film reaches the rear surface 42b, so that an epitaxial film 60 attaches to an outer peripheral portion 44 of the rear surface 42b of the semiconductor wafer. Therefore, although the thickness of the epitaxial film 50 itself is uniform, the thickness profile of the epitaxial wafer 200 including the semiconductor wafer 40 in the wafer diameter direction is the thickness profile including additional thickness of the epitaxial film 60 attached to the outer peripheral portion 44. As a result, there has been a problem in that the flatness of the whole epitaxial wafer degrades. In particular, as the thickness of the formed epitaxial film 50 increases, the thickness of the epitaxial film 60 attached to the outer peripheral portion 44 of the rear surface 42b increases accordingly. This further degrades the flatness. Note that, in this specification, one of the surfaces of a semiconductor wafer, on which a main epitaxial film is grown, is referred to as a “top surface” of the semiconductor wafer, and the other surface opposite thereto is referred to as a “rear surface” of the semiconductor wafer as above.
As the design rules get smaller with recent increase in the integrity of semiconductor devices, severer flatness has been demanded on involving epitaxial silicon wafers. Further, it is desirable to obtain as many devices as possible from one wafer, and as wafers have larger diameters, a flat shape has been required throughout the surface of the wafers, especially even at the edge portions thereof (wafer end portion). The measurement exclusion range of flatness of a wafer surface (edge exclusion) has been conventionally 3 mm from the wafer edge, it is now 2 mm progressively, and even further reduction to 1 mm is almost challenged.
Under these circumstances, in order to improve flatness of epitaxial wafers, Patent Literature 1 discloses a producing method in which a step of mirror-polishing a top surface or both surfaces of an epitaxial wafer is performed after forming an epitaxial film. Further, Patent Literature 2 and Patent Literature 3 describe techniques of mirror-polishing an epitaxial film surface after forming the epitaxial film.